TRL & Hardware Development Phases - Mapping Technology Readiness Levels to Concept / EVT / DVT / PVT / Mass Production
TRL (Technology Readiness Level according NASA definition and as used in EU) is a scale from 1 to 9 that measures the maturity of a technology independent of its production readiness. The hardware development gate framework (Concept → EVT → DVT → PVT → Mass Production) measures the combined readiness of technology, design, manufacturing process, supply chain and quality system. The two frameworks are complementary, not redundant. A product can enter EVT with a high-TRL core technology (e.g. a known battery chemistry at TRL 6) while a subsystem such as firmware integration may still be at TRL 3. The gate framework governs the whole product — which is why each discipline (Mechanical, Electrical, Firmware, Supply Chain, Hardware Operations, Quality, etc.) has its own exit criteria per gate rather than a single TRL number for the system. Often, internal conversations mix up the discussion of Technical Readiness Level (e.g. used in Research heavy environments) and the Hardware Phase Gates...
